Side-channel

Autocat, Reinforcement learning for automated exploration of cache-timing attacks

The aggressive performance optimizations in modern microprocessors can result in security vulnerabilities. For example, timing-based …

Mulong Luo, Wenjie Xiong, Geunbae Lee, Yueying Li, Xiaomeng Yang, Amy Zhang, Yuandong Tian, Hsien-Hsin S Lee, G Edward Suh